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Sheet目录3862

130页 131页 132页 133页 [134页]135页 136页 137页 138页

2010 Microchip Technology Inc.

DS70138G-page 219

dsPIC30F3014/4013

INDEX

Numerics

12-Bit Analog-to-Digital Converter (A/D) Module .............. 131

A/D .................................................................................... 131

Aborting a Conversion .............................................. 133

ADCHS Register ....................................................... 131

ADCON1 Register..................................................... 131

ADCON2 Register..................................................... 131

ADCON3 Register..................................................... 131

ADCSSL Register ..................................................... 131

ADPCFG Register..................................................... 131

Configuring Analog Port Pins.............................. 54, 1 38

Connection Considerations....................................... 138

Conversion Operation ............................................... 132

Effects of a Reset...................................................... 137

Operation During CPU Idle Mode ............................. 137

Operation During CPU Sleep Mode .......................... 137

Output Formats ......................................................... 137

Power-Down Modes.................................................. 137

Programming the Sample Trigger............................. 133

Result Buffer ............................................................. 132

Sampling Requirements............................................ 136

Selecting the Conversion Sequence......................... 132

AC Characteristics ............................................................ 180

Load Conditions ........................................................ 181

AC Temperature and Voltage Specifications .................... 181

AC-Link Mode Operation .................................................. 128

16-Bit Mode............................................................... 128

20-Bit Mode............................................................... 129

ADC

Selecting the Conversion Clock ................................ 133

ADC Conversion Speeds .................................................. 134

Address Generator Units .................................................... 37

Alternate Vector Table ........................................................ 64

Analog-to-Digital Converter. See A/D.

Assembler

MPASM Assembler................................................... 168

Automatic Clock Stretch...................................................... 94

During 10-Bit Addressing (STREN = 1) ...................... 94

During 7-Bit Addressing (STREN = 1) ........................ 94

Receive Mode ............................................................. 94

Transmit Mode ............................................................ 94

Band Gap Start-up Time

Requirements............................................................ 187

Barrel Shifter ....................................................................... 23

Bit-Reversed Addressing .................................................... 40

Example ...................................................................... 40

Implementation ........................................................... 40

Modifier Values Table ................................................. 41

Sequence Table (16-Entry)......................................... 41

Block Diagrams

12-Bit A/D Functional ................................................ 131

16-Bit Timer1 Module.................................................. 67

16-Bit Timer2 .............................................................. 73

16-Bit Timer3 .............................................................. 73

16-Bit Timer4 .............................................................. 78

16-Bit Timer5 .............................................................. 78

32-Bit Timer2/3 ........................................................... 72

32-Bit Timer4/5 ........................................................... 77

CAN Buffers and Protocol Engine ............................ 112

DCI Module............................................................... 122

Dedicated Port Structure ............................................ 53

DSP Engine ................................................................ 20

dsPIC30F3014............................................................ 11

dsPIC30F4013............................................................ 12

External Power-on Reset Circuit .............................. 153

I2C .............................................................................. 92

Input Capture Mode.................................................... 81

Oscillator System...................................................... 143

Output Compare Mode ............................................... 85

Reset System ........................................................... 151

Shared Port Structure ................................................. 54

SPI............................................................................ 100

SPI Master/Slave Connection................................... 100

UART Receiver......................................................... 104

UART Transmitter..................................................... 103

BOR Characteristics ......................................................... 180

BOR. See Brown-out Reset.

Brown-out Reset

Timing Requirements ............................................... 187

C Compilers

MPLAB C18 .............................................................. 168

CAN Module ..................................................................... 111

Baud Rate Setting .................................................... 116

CAN1 Register Map.................................................. 118

Frame Types ............................................................ 111

I/O Timing Requirements.......................................... 205

Message Reception.................................................. 114

Message Transmission............................................. 115

Modes of Operation .................................................. 113

Overview................................................................... 111

CLKOUT and I/O Timing

Requirements ........................................................... 185

Code Examples

Data EEPROM Block Erase ....................................... 50

Data EEPROM Block Write ........................................ 52

Data EEPROM Read.................................................. 49

Data EEPROM Word Erase ....................................... 50

Data EEPROM Word Write ........................................ 51

Erasing a Row of Program Memory ........................... 45

Initiating a Programming Sequence ........................... 46

Loading Write Latches ................................................ 46

Port Write/Read .......................................................... 54

Code Protection ................................................................ 141

Control Registers ................................................................ 44

NVMADR .................................................................... 44

NVMADRU ................................................................. 44

NVMCON.................................................................... 44

NVMKEY .................................................................... 44

Core Architecture

Overview..................................................................... 15

CPU Architecture Overview ................................................ 15

Customer Change Notification Service............................. 225

Customer Notification Service .......................................... 225

Customer Support............................................................. 225

Data Accumulators and Adder/Subtracter .......................... 21

Data Accumulators and Adder/Subtractor

Data Space Write Saturation ...................................... 23

Overflow and Saturation ............................................. 21

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